Ashkan Moradifirouzabadi

ashkan [at] ucsd [dot] edu

I am a Ph.D. candidate in Computer Engineering at the University of California, San Diego, advised by Prof. Mingu Kang. My research focuses on hardware-algorithm co-design for efficient AI systems, with an emphasis on LLM optimization, in-memory computing, VLSI, and computer architecture.

I work across the stack, from compression algorithms for LLMs to architecture and system design for ML inference, and fabricated accelerator prototypes. Recent projects include low-rank KV cache compression, sparse attention acceleration, and PIM-enabled systems for LLM inference.

I received my M.S. in Computer Engineering from UC San Diego and my B.Sc. in Electrical Engineering from the University of Tehran. In summer 2024, I was a Technology Research Intern at Intel, working on hardware accelerator design for LLMs.

Research interests: hardware-algorithm co-design, LLM optimization, ML systems, computer architecture, and VLSI.

Selected Publications

ICML

✨ STAR-KV: Low-Rank KV Cache Compression via Soft Thresholding for Adaptive Rank Control

Priyansh Bhatnagar^*, Ashkan Moradifirouzabadi^*, S. Yang, and 3 more authors

In Forty-third International Conference on Machine Learning (ICML), Jul 2026

✨ Spotlight paper.
* Equal contribution.
ESSERC

An Analog and Digital Hybrid Attention Accelerator for Transformers with Charge-based In-memory Computing

Ashkan Moradifirouzabadi, D. S. Dodla, and Mingu Kang

In IEEE 50th European Solid State Electronics Research Conference (ESSERC), Sep 2024
JSSC

HyAtt: A Hybrid Attention Accelerator for Transformers with Analog In-memory Computing

Ashkan Moradifirouzabadi, and Mingu Kang

IEEE Journal of Solid-State Circuits, Sep 2025
MICRO

Sparse Attention Acceleration with Synergistic In-memory Pruning and On-chip Recomputation

A. Yazdanbakhsh^*, Ashkan Moradifirouzabadi^*, Z. Li^*, and 1 more author

In Proceedings of the 55th IEEE/ACM International Symposium on Microarchitecture (MICRO), Oct 2022

* Equal contribution.